The standard designs of multicarrier and single-carrier transceivers employing frequency-domain equalization require an amount of redundancy of at least the order of the channel. This redundancy eliminates the inherent inter-block interference (IBI), and allows the exploitation of the resulting channel matrix to design computationally efficient zero-forcing (ZF) and minimum mean squared error (MMSE) equalizers.

Although it is well known that the minimum redundancy for IBI-free designs of fixed and memoryless transceivers is around half of the channel order, all practical solutions do not employ minimum redundancy. This presentation introduces in a unified way and in a tutorial format a family of block transceivers with superfast implementation employing a range of values for the redundancy starting from the minimum up to the standard values. The related designs of practical ZF and MMSE transceivers are presented and their performances are compared in terms of throughput for fixed bit-error rate. Even in the applications following the available standards it is possible to reduce the guard period safely when employing reduced redundancy transceivers.

The main feature of the proposed transceivers is their higher throughput allowing the use of the wireless and wired channels more effectively.

Paulo S. R. Diniz was born in Niterói, Brazil. He received the Electronics Engineer degree from the Universidade Federal do Rio de Janeiro (UFRJ) in 1978, the M.Sc. degree from COPPE/UFRJ in 1981, and the Ph.D. from Concordia University, Montreal, PQ, Canada, in 1984, all in electrical engineering.

Since 1979, he has been with the undergraduate Department of Electronics and Computer Engineering at the UFRJ. He has also been with the graduate Program of Electrical Engineering at COPPE/UFRJ since 1984, where he is presently a Professor. He served as undergraduate course Coordinator and as Chairman of the graduate department. He is one of the three senior researchers and coordinators of the Brazilian National Excellence Center in Signal Processing. He has received the Rio de Janeiro State Scientist Award from the Governor of Rio de Janeiro State, and the Distinguished Research Scientist Award from COPPE/UFRJ (2002).

From January 1991 to July 1992, he was a visiting Research Associate in the Department of Electrical and Computer Engineering of University of Victoria, Victoria, BC, Canada. In 2002 he served as Melchor Endowment Chair Professor in the Department of Electrical Engineering of the University of Notre Dame, Notre Dame, USA. He also holds a Docent position at the Signal Processing laboratory of Helsinki University of Technology, and has taught short courses at numerous institutions around the world.

His teaching and research interests are in analog and digital signal processing, adaptive signal processing, digital communications, wireless communications, multirate systems, stochastic processes, and electronic circuits. He has published over 200 refereed papers in some of these areas and wrote two books. He has received some awards for best papers and technical achievements.

He is serving as the technical co-Chair of the 9th IEEE International Signal Processing for Advances in Wireless Communications (SPAWC) to be held in Recife in 2008, and will serve as general co-Chair for the IEEE International Symposium on Circuits and Systems (ISCAS) to be held in Rio in 2011. He was the Technical Program Chair of the 1995 MWSCAS held in Rio de Janeiro, Brazil. He has been on the technical committee of several international conferences including ISCAS, ICECS, EUSIPCO and MWSCAS. He has served Vice President for region 9 of the IEEE Circuits and Systems Society and as Chairman of the DSP technical committee of the same Society. He is also a Fellow of IEEE (for fundamental contributions to the design and implementation of fixed and adaptive filters and Electrical Engineering Education). He has served as associate editor for the following Journals: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing from 1996 to 1999, IEEE Transactions on Signal Processing from 1999 to 2002, and the Circuits, Systems and Signal Processing Journal from 1998 to 2002. He was a distinguished lecturer of the IEEE Circuits and Systems Society for the years 2000 to 2001 and had served as distinguished lecturer of the IEEE Signal Processing Society in 2004.